SOC Design & Verification

Immediate need for a talented SOC Design & Verification. This is a 12+months contract opportunity with long-term potential and is located in U.S(Remote). Please review the job description below and contact me ASAP if you are interested.
 
Job ID: 25-58281
 
Pay Range: $65 - $70/hour.  Employee benefits include, but are not limited to, health insurance (medical, dental, vision), 401(k) plan, and paid sick leave (depending on work location).

Key Requirements and Technology Experience: 

• Key skills; Verification, Verilog, Design
• SOC Design Verrification in VLSI Verilog
• General verification expertise –
• System Verilog
• UVM working experience (In the current scenario not much on UVM, but heavily on “C”)
• Understanding of ARM processor based SOCs, AXI / AHB
• Working knowledge of Processor based C tests for SOC verification (test coding, compilation, loading in TB, failure debug)
• Strong hands on work experience of test development, simulation along with usage of popular EDA tools
• Good debug skills –
• Check that engineer has done reasonable amount of debug in past projects
• Has logical and methodical approach to debug issues /failures
• Has used standard tools for debugging, as applicable
• Coresight knowledge / debug is an added advantage.
• We have many tests for connectivity using jasper gold need quick debug effort and it is good have that skill set.
• Good problem solving skills –
• Assess by giving some sample problems to solve online during the interview
• Specific experience with following is a big advantage –
• Dynamic cdc verification
• Clock sweep tests, dynamic frequency scaling
• Verification of complex reset architectures
• Debugging of above issues in GLS environment.

Our client is a leading IT Industry, and we are currently interviewing to fill this and other similar contract positions. If you are interested in this position, please apply online for immediate consideration.

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